View MAX4533EWP_3993864.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

general description the max4533 quad, single-pole/double-throw (spdt), fault-protected analog switch is pin-compatible with the industry-standard max333 and max333a. the max4533 features fault-protected inputs and rail-to-rail signal handling. the normally open (no_ ) and normally closed (nc_ ) terminals are protected from overvoltage faults up to ?5v with power on and up to ?0v with power off. during a fault condition, no_ and nc_ become high impedance with only nanoamperes of leakage current flowing to the source. in addition, the output (com_) clamps to the appropriate polarity supply rail and pro- vides up to ?0ma of load current. this ensures unam- biguous rail-to-rail outputs when a fault occurs. the max4533 operates from dual ?.5v to ?8v power supplies or a single +9v to +36v supply. all digital inputs have +0.8v and +2.4v logic thresholds, ensuring both ttl and cmos logic compatibility when using ?5v supplies or a +12v supply. on-resistance is 175 ? max and is matched between switches to 10 ? max. the off- leakage current is only 0.5na at t a = +25? and 10na at t a = +85?. applications redundant/backup systems portable instruments test equipment data-acquisition communications systems systems industrial and process control avionics systems features rail-to-rail signal handling 40v fault protection with power off 25v fault protection with 15v supplies all switches off with power off no power-supply sequencing required during power-up or power-down output clamped to appropriate supply voltage during fault condition?o transition glitch 1k ? (typ) output clamp resistance during overvoltage 175 ? (max) signal paths with 15v supplies 20ns (typ) fault response time 4.5v to 18v dual supplies +9v to +36v single supply pin-compatible with industry-standard max333/max333a ttl/cmos-compatible logic inputs with 15v or single +9v to +15v supplies max4533 ? quad, rail-to-rail, fault-protected, spdt analog switch ________________________________________________________________ maxim integrated products 1 switches are shown with logic "0" input n.c. = not internally connected 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 in4 no4 com4 nc4 nc1 com1 no1 in1 max4533 v+ n.c. nc3 com3 com2 nc2 gnd v- no3 in3 in2 no2 top view ssop/so/dip/cerdip inputs v1 v2 osc in v3 v4 flying capacitor level translator (2-channel) outputs v1 - v2 v3 - v4 max4533 typical operating circuit 19-1452; rev 1; 10/99 part max4533cap max4533cwp 0? to +70? 0? to +70? temp. range pin-package 20 ssop 20 wide so ordering information continued at end of data sheet. pin configuration/ functional diagram ordering information rail-to-rail is a registered trademark of nippon motorola, ltd. ? patent pending for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
max4533 quad, rail-to-rail, fault-protected, spdt analog switch 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics dual supplies (v+ = +15v, v- = -15v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 3) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. voltages referenced to gnd v+ ........................................................................-0.3v to +44.0v v- .........................................................................-44.0v to +0.3v v+ to v-................................................................-0.3v to +44.0v com_, in_ (note 1) ............................. (v- - 0.3v) to (v+ + 0.3v) nc_, no_ (note 2)..................................(v+ - 40v) to (v- + 40v) nc_, no_ to com_ .................................................-40v to +40v nc_, no_ overvoltage with switch power on (supplies at ?5v) ................................................-30v to +30v nc_, no_ overvoltage with switch power off ........-40v to +40v continuous current into any terminal..............................?0ma peak current into any terminal (pulsed at 1ms,10% duty cycle)....................................?0ma continuous power dissipation (t a = +70?) 20-pin ssop (derate 10.53mw/? above +70?) ........842mw 20-pin wide so (derate 10.00mw/? above +70?) .. 800mw 20-pin plastic dip (derate 11.11mw/? above +70?) 889mw 20-pin cerdip (derate 11.11mw/? above +70?).....889mw operating temperature ranges max4533c_ _ ......................................................0? to +70? max4533e_ _ ...................................................-40? to +85? max4533m_ _.................................................-55? to +125? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? note 1: com_ and in_ pins are not fault protected. signals on com_ or in_ exceeding v+ or v- are clamped by internal diodes. limit forward diode current to maximum current rating. note 2: nc_ and no_ pins are fault protected. signals on nc_ or no_ exceeding -25v to +25v may damage the device. these limits apply with power applied to v+ or v-. the limit is ?0v with v+ = v- = 0. v no _ or v nc _ = ?0v, i com _ = 1ma v+ = +15v, v- = -15v, v no _ or v nc _ = ?5v v com_ = +5v, 0, -5v, i com_ = 1ma conditions ? 125 175 r on com_ to no_ or com_ to nc_ on-resistance v v- v+ v no _ , v nc _ fault-free analog signal range (note 2) -200 200 250 ? 4 on-resistance flatness na -0.5 0.02 0.5 i no_(off), i nc_(off) no_ or nc_ off-leakage current (note 5) -10 10 units min typ max symbol parameter +25? c, e, m m m +25? +25? c, e t a c, e 200 +25? v no _ or v nc _ = ?0v, i com _ = 1ma m c, e 10 ? 16 ? r on com_ to no_ or com_ to nc_ on-resistance match between channels (note 4) 15 m v no _ or v nc _ = ?4v, v com _ = 14v v com_ = ?4v, v no_ or v nc_ = ?4v or floating +25? c, e -400 400 na -0.5 0.01 0.5 i com_(on) com_ on-leakage current (note 5) -20 20 +25? -25 +25 applies with power on v no_ , v nc_ v fault-protected analog signal range (note 2) m v no _ or v nc _ = ?5v, v com _ = 10v v no_ or v nc_ = ?5v, no connection to ?n?channel +25? c, e -10 10 -10 10 -200 200 i com_ na com_ output leakage current, supplies on m +25? c, e -10 10 -20 20 i no_, i nc_ -200 200 ? na no_ or nc_ off input leakage current, supplies on applies with power off +25? -40 +40 ? fault analog switch
max4533 quad, rail-to-rail, fault-protected, spdt analog switch _______________________________________________________________________________________ 3 electrical characteristics dual supplies (continued) (v+ = +15v, v- = -15v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 3) conditions t a units min typ max symbol parameter +25? +25? c, e 1.0 2.5 -20 0.1 20 i no_, i nc_ -200 200 no_ or nc_ input leakage current, supplies off com_ on-clamp output resistance, supplies on na +25? v no_ or v nc = ?5v c, e, m 20 3 r com_ ns k ? r l = 10k ? , v no_ or v nc_ = ?5v ?ault output clamp turn-on delay time (note 6) c, e, m 2.4 v v in_h in_ input logic threshold high +25? 100 250 c, e 400 m +25? 600 10 50 v com_ = ?0v, r l = 1k ? ; figure 3 t bbm break-before-make time delay ns r l = 10k ? , v no_ or v nc_ = ?5v +25? 2.5 ? ?ault recovery time (note 6) c, e, m 0.8 v v in_l in_ input logic threshold low v in_ = +0.8v or +2.4v +25? -1 0.03 1 i in_h, i in_l ? in_ input current logic high or low c, e, m -5 5 v com_ = ?0v, r l = 2k ? ; figure 2 t on turn-on time ns r l = 50 ? , c l = 15pf, v n_ = 1v rms , f = 1mhz; figure 6 f = 1mhz; figure 5 v iso c n_(off) off-isolation (note 7) no_ or nc_ off-capacitance db pf +25? 5 +25? -62 +25? 60 150 v no_ = ?0v, r l = 2k ? ; figure 2 t off turn-off time ns c, e 300 m 450 ?.5 ?8 v v+, v- power-supply range c, e, m +25? 600 400 ? all v in_ = 0 or +5v, v no_ = v nc_ = 0 c, e, m +25? 1000 600 ? all v in_ = 0 or +5v, v no_ = v nc_ = 0 i+ v+ supply current i- v- supply current +25? 1.5 c l = 100pf, v com_ = 0; figure 4 q pc charge injection (note 6) f = 1mhz; figure 5 c com_(on) com_ on-capacitance pf +25? 12 r l = 50 ? , c l = 15pf, v n_ = 1v rms , f = 1mhz; figure 6 v ct channel-to-channel crosstalk (note 8) db +25? -66 c, e, m +25? 450 300 ? all v in_ = 0 or +5v, v no_ = v nc_ = 0 i gnd gnd supply current v no_ or v nc_ = +25v +25? +25? 81113 i com_ -12 -10 -7 com_ on-clamp output current, supplies on v no_ or v nc_ = -25v ma v no_ or v nc_ = ?0v, v+ = 0, v- = 0 m -10 10 ? logic input switch dynamic characteristics power supply
max4533 quad, rail-to-rail, fault-protected, spdt analog switch 4 _______________________________________________________________________________________ electrical characteristics single supply (v+ = +12v, v- = 0, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 3) +25? c, e, m v+ = +12v, v no _ or v nc _ = +10v, i com _ = 1ma m v+ = +12v, v com_ = +10v, v no_ or v nc_ = +10v or floating v+ = +12v, v- = 0, v no _ or v nc _ = +12v or 0 +25? c, e -400 400 m na -0.5 0.01 0.5 i com_(on) com_ on-leakage current (notes 5, 9) -20 20 applies with power off +25? v+ = +12v, v com_ = +10v, +1v, v no_ or v nc_ = +1v, +10v +25? conditions m +25? +25? c, e t a c, e v+ = +12v, v no _ or v nc _ = +10v, i com _ = 1ma m 450 c, e 20 ? 410 ? r on com_ -no_ on-resistance match between channels (note 4) 30 -40 +40 -25 +25 ? applies with power on v no_ , v nc_ m v v no_ or v nc_ = ?0v, v+ = 0, v- = 0 fault-protected analog signal range (note 2) m v no_ or v nc_ = ?5v, v+ = +12v, no connection to ?n?channel +25? c, e -10 10 +25? -10 10 c, e -10 10 -200 200 -20 0.1 20 i no_, i nc_ -200 200 i com_ ? na com_ output leakage current, supply on (note 9) na m v no_ or v nc_ = ?5v, v com_ = 0, v+ = +12v +25? c, e ? 260 390 r on com_ to no_, com_ to nc_ on-resistance v 0v+ v no _ , v nc _ fault-free analog signal range (note 2) -10 10 no_ or nc_ input leakage current, supply off (note 9) -20 20 i no_, i nc_ -200 200 ? na no_ or nc_ off input leakage current, supply on (note 9) -200 200 525 na -0.5 0.01 0.5 i no_(off), i nc_(off) no_ or nc_ off-leakage current (notes 5, 9) -10 10 units min typ max symbol parameter +25? 235 v no_ or v nc_ = ?5v, v+ = +12v i com_ ma com_ on-clamp output current, supply on +25? c, e, m c, e, m -1 0.03 1 2.4 v in_h 0.8 ? v in_ input logic threshold high v in_ = +0.8v or +2.4v i in_h, i in_l v in_l v in_ input current logic high or low in_ input logic threshold low +25? 2.4 5 v no_ or v nc_ = ?5v, v+ = +12v r com_ k ? com_ on-clamp output resistance, supply on c, e, m -5 5 analog switch fault logic input
max4533 quad, rail-to-rail, fault-protected, spdt analog switch _______________________________________________________________________________________ 5 note 3: the algebraic convention is used in this data sheet; the most negative value is shown in the minimum column. note 4: ? r on = r on(max) - r on(min) . note 5: leakage parameters are 100% tested at maximum-rated hot temperature and guaranteed by correlation at t a = +25?. note 6: guaranteed by design. note 7: off-isolation = 20log10(v com_ / v no_ ), v com_ = output, v no_ = input to off switch. note 8: between any two analog inputs. note 9: leakage testing for single-supply operation is guaranteed by testing with dual supplies. electrical characteristics single supply (continued) (v+ = +12v, v- = 0, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 3) conditions t a +25? 200 500 v com_ = +10v, r l = 2k ? ; figure 2 t on turn-on time ns c, e, m +25? 550 350 f = 1mhz; figure 5 c, e, m c com_(on) 1000 r l = 50 ? , c l = 15pf, v no_ = 1v rms , f = 1mhz; figure 6 f = 1mhz; figure 5 v iso c n_(off) off-isolation (note 7) no_ or nc_ off-capacitance db ? pf all v in_ = 0 or +5v, v no_ = v nc_ = 0 c, e, m i gnd +25? v- and gnd supply current 5 100 936 v com_ = +10v, r l = 1k ? ; figure 3 v t bbm break-before-make time delay ns +25? 5 r l = 50 ? , c l = 15pf, v no_ = 1v rms , f = 1mhz; figure 6 com_ on-capacitance +25? v ct units min typ max symbol parameter channel-to-channel crosstalk (note 8) -62 pf db +25? +25? 15 -65 v+ power-supply range c, e, m +25? 350 200 ? all v in_ = 0 or +12v, v no_ = v nc_ = 0 c, e, m +25? 550 350 ? all v in_ = 0 or +5v, v no_ = v nc_ = 0 i+ v+ supply current +25? 2 c l = 100pf, v com_ = 0; figure 4 q pc charge injection +25? 100 300 v com_ = +10v, r l = 2k ? ; figure 2 t off turn-off time ns c, e, m 900 switch dynamic characteristics power supply
max4533 quad, rail-to-rail, fault-protected, spdt analog switch 6 _______________________________________________________________________________________ typical operating characteristics (v+ = +15v, v- = -15v, t a = +25?, unless otherwise noted.) 0 90 60 30 120 150 210 180 240 270 300 330 360 390 -18 -12 -9 -15 -6-30369121518 on-resistance vs. v com (dual supplies) max4533 toc01 v com (v) r on ( ? ) v?= ?.5v v?= ?0v v?= ?2v v?= ?5v v?= ?8v 0 100 50 200 150 250 300 350 400 01015 5 2025303540 on-resistance vs. v com (single supply) max4533toc02 v com (v) r on ( ? ) v- = 0 v+ = +12v v+ = +15v v+ = +20v v+ = +25v v+ = +30v v+ = +36v v+ = +9v 0 75 50 25 100 125 150 175 200 225 250 -15 -5 -10 0 5 10 15 on-resistance vs. v com and temperature (dual supplies) max4533 toc03 v com (v) r on ( ? ) v+ = +15v v- = -15v t a = +85? t a = +125? t a = +70? t a = +25? t a = 0? t a = -40? t a = -55? 0 100 50 250 200 150 400 350 300 450 04 2681012 on-resistance vs. v com and temperature (single supply) max4533 toc04 v com (v) r on ( ? ) t a = +125 c t a = +70 c t a = +85 c t a = -40 c t a = 0 c t a = -55 c t a = +25 c v+ = +12v v- = 0 0 200 100 400 300 500 600 4 10 12 6 8 14 16 18 turn-on/turn-off time vs. supply voltage (dual supplies) max4533 toc07a supply voltage (v) t on , t off (ns) t on t off 0.0001 0.01 0.001 1 0.1 100 10 1000 -55 -15 5 -35 25 45 65 85 105 125 on/off-leakage current vs. temperature max4533 toc05 temperature ( c) leakage current (a) i com_on (v+ = +15v, v- = -15v) i com_on (v+ = +12v, v- = 0) i nc_off (v+ = +12v, v- = 0) i nc_off (v+ = +15v, v- = -15v) 0 1.0 0.5 2.0 1.5 3.0 2.5 3.5 4.5 4.0 5.0 -15 -10 -5 0 15 510 charge injection vs. v com max4533 toco6 v com (v) q (pc) single supply dual supplies 0 50 150 100 200 250 816 12 20 24 28 32 36 turn-on/turn-off time vs. supply voltage (single supply) max4533 toc07b supply voltage (v) t on , t off (ns) t on t off 0 40 20 80 60 120 100 140 180 160 200 -55 -15 5 25 -35 45 65 85 105 125 turn-on/turn-off time vs. temperature (dual supplies) max4533 toc08a temperature ( c) t on , t off (ns) t on t off v+ = +15v v- = -15v
max4533 quad, rail-to-rail, fault-protected, spdt analog switch _______________________________________________________________________________________ 7 0 50 100 150 200 250 -55 25 45 -15 5 -35 65 85 105 125 turn-on/turn-off time vs. temperature (single supply) max4533 toc08b temperature ( c) t on , t off (ns) t on t off v+ = +12v v- = 0 -500 -300 -400 -100 -200 100 0 200 400 300 500 -55 -15 5 25 -35 45 65 85 105 125 power-supply current vs. temperature (dual supplies, v in = 0) max4533 toc09a temperature ( c) supply current (a) v+ = +15v v- = -15v i+ i gnd i- -600 -200 -400 200 0 600 400 800 -55 -15 5 -35 25 45 65 85 105 125 power-supply current vs. temperature (dual supplies, v in = +5v) max4533 toc09b temperature ( c) supply current (a) i+ i gnd i- v+ = +15v v- = -15v 0 100 50 250 200 150 350 300 400 -55 5 25 -35 -15 45 65 85 105 125 power-supply current vs. temperature (single supply) max4533 toc09c temperature ( c ) supply current (a) i+ i gnd v+ = +12v v- = 0 v in = +5v 0 1.0 0.5 2.0 1.5 2.5 3.0 4 8 12 16 20 24 28 32 36 logic-level threshold vs. supply voltage max4533 toc10 supply voltage (v) logic-level threshold (v) dual-supply range single-supply range com_ (10v/div) no_ or nc_ (10v/div) ov ov overvoltage with 25v input max4533 toc11 5s/div typical operating characteristics (continued) (v+ = +15v, v- = -15v, t a = +25?, unless otherwise noted.) com_ (10v/div) no_ or nc_ (10v/div) ov ov fault-free signal with 15v input max4533 toc12 5 s/div com_ (10v/div) no_ or nc_ (10v/div) ov ov fault recovery time max4533 toc13 2 s/div
max4533 quad, rail-to-rail, fault-protected, spdt analog switch 8 _______________________________________________________________________________________ 0 -100 0.01 0.1 1 10 100 1000 frequency response (dual supplies) -80 -90 -70 max4533 toc14a frequency (mhz) response (db) -60 -50 -40 -30 -10 -20 bandwidth v+ = +15v v- = -15v crosstalk off isolation typical operating characteristics (continued) (v+ = +15v, v- = -15v, t a = +25?, unless otherwise noted.) 0 -100 0.01 0.1 1 10 100 1000 frequency response (single supply) -80 -90 -70 max4533 toc14b frequency (mhz) response (db) -60 -50 -40 -30 -10 -20 bandwidth v+ = +12v v- = 0 crosstalk off isolation pin description detailed description the max4533 is a fault-protected analog switch with special operation and construction. traditional fault-pro- tected switches are constructed using three-series cmos devices. this combination produces good fault protection but fairly high on-resistance when the signals are within about 3v of each supply rail. these series devices are not capable of handling signals up to the power-supply rails. the max4533 differs considerably from traditional fault- protected switches, with three advantages. first, it is constructed with two parallel fets, allowing very low on-resistance when the switch is on. second, they allow signals on the nc_ or no_ pins that are within or slightly beyond the supply rails to be passed through the switch to the com_ terminal, allowing rail-to-rail signal opera- tion. third, when a signal on nc_ or no_ exceeds the supply rails by about 150mv (a fault condition), the volt- age on com_ is limited to the appropriate polarity sup- ply voltage. operation is identical for both fault polarities. the fault-protection extends to ?5v with power on and ?0v with power off. the max4533 has a parallel n-channel and p-channel mosfet switch configuration with input voltage sensors. the simplified internal structure is shown in figure 1. the parallel n1 and p1 mosfets form the switch element. n3 and p3 are sensor elements to sample the input volt- age and compare it against the power-supply rails. name function 1, 10, 11, 20 in1, in2, in3, in4 logic control digital inputs pin 2, 9, 12, 19 no1, no2, no3, no4 normally open inputs* 3, 8, 13, 18 com1, com2, com3, com4 analog switch common outputs* 4, 7, 14, 17 nc1, nc2, nc3, nc4 normally closed inputs* 5 v- negative analog supply voltage input 6 gnd digital ground 15 n.c. no connection. not internally connected. 16 v+ positive analog and digital supply-voltage input * when the voltage on no_ or nc_ does not exceed v+ or v-, no_ (or nc_) and com_ pins are bidirectional.
during normal operation of a conducting channel, n1 and p1 remain on with a typical 125 ? on-resistance between no_ (or nc_) and com_. if the input voltage exceeds either supply rail by about 150mv, the parallel combination switches (n1, p1) are forced off through the driver and sensing circuitries. at the same time, the output (com_ ) is clamped to the appropriate supply rail by the clamp circuitries (n2, p2). two clamp circuits limit the output voltage to the supply voltages. for simplicity, figure 1 shows only one side of the spdt switch configuration. the complete circuit is composed of two channels with their outputs connected. normal operation two comparators continuously compare the voltage on the no_ (or nc_ ) pin with v+ and v- supply voltages. when the signal on no_ (or nc_ ) is between v+ and v-, the switch behaves normally, with fets n1 and p1 turning on and off in response to no_ (or nc_) signals (figure 1). for any voltage between the supply rails, the switch is bidirectional; therefore, com_ and nc_ (or no_ ) are interchangeable. only no_ and nc_ can be exposed to overvoltages beyond the supply range and within the specified breakdown limits of the device. fault condition the max4533 protects devices connected to its output (com_) through its unique fault-protection circuitry. when the input voltage is raised above either supply rail, the internal sense and comparator circuitries (n3 and n-channel driver or p3 and p-channel driver) dis- connect the output (com_) from the input (figure 1). if the switch driven above the supply rail has an on state, the clamp circuitries (n2 or p2) connect the out- put to the appropriate supply rail. table 1 summarizes the max4533? operation under normal and fault condi- tions. row 5 shows a negative fault condition when the supplies are on. it shows that with supplies of ?5v, if the input voltage is between -15v and -25v, the output (com_) clamps to the negative supply rail of -15v. with this technique, the spdt switch is capable of with- standing a worse-case condition of opposite fault polar- ities at its inputs. transient fault condition when a fast rising or falling transient on no_ (or nc_) exceeds v+ or v-, the output (com_) follows the input (in_) to the supply rail by only a few nanoseconds. this delay is due to the switch on-resistance and circuit capacitance to ground. however, when the input tran- sient returns to within the supply rails there is a longer recovery time. for positive faults, the recovery time is typically 2.5?. for negative faults, the recovery time is typically 1.3?. these values depend on the com_ out- put resistance and capacitance. the delays are not dependent on the fault amplitude. higher com_ output resistance and capacitance increase the recovery times. fault protection, voltage, and power off the maximum fault voltage on the no_ or nc_ pins is ?0v from ground when the power is off. with ?5v sup- ply voltages, the highest voltage on no_ (or nc_) can be +25v, and the lowest voltage on no_ (or nc_) can be -25v. exceeding these limits can damage the chip. in_ logic-level thresholds the logic-level thresholds are ttl/cmos-compatible when v+ is +15v. raising v+ increases the threshold slightly; when v+ reaches +25v, the level threshold is 2.8v?igher than the ttl output high-level minimum of 2.4v, but still compatible with cmos outputs (see the typical operating characteristics ). increasing v- has no effect on the logic-level thresh- olds, but it does increase the gate-drive voltage to the signal fets, reducing their on-resistance. max4533 quad, rail-to-rail, fault-protected, spdt analog switch _______________________________________________________________________________________ 9 -15v -15v +15v p-channel driver n-channel driver +15v n3 p3 input nc_ or no_ n1 clamp output com_ clamp +v(+15v) -v(-15v) n2 p2 p1 comparator comparator sense switch sense switch figure 1. simplified internal structure
failure modes the max4533 is not a lightning arrester or surge pro- tector. exceeding the fault-protection voltage limits on no_ or nc_, even for very short periods, can cause the device to fail. applications information ground there is no connection between the analog signal paths and gnd. the analog signal paths consist of an n-channel and p-channel mosfet with their sources and drains paralleled and their gates driven out of phase to v+ and v- by the logic-level translators. v+ and gnd power the internal logic and logic-level translators and set the input logic thresholds. the logic- level translators convert the logic levels to switched v+ and v- signals to drive the gates of the switches. this drive signal is the only connection between the power supplies and the analog signals. gnd, in_, and com_ have esd protection diodes to v+ and v-. supply current reduction when the logic signals are driven rail-to-rail from 0 to +12v or -15v to +15v, the supply current reduces to approximately half of the supply current when the logic input levels are at 0 to 5v. power supplies the max4533 operates with bipolar supplies between ?.5v and ?8v. the v+ and v- supplies need not be symmetrical, but their difference can not exceed the absolute maximum rating of +44v. the max4533 oper- ates from a single supply between +9v and +36v when v- is connected to gnd. max4533 quad, rail-to-rail, fault-protected, spdt analog switch 10 ______________________________________________________________________________________ table 1. switch states in normal and fault conditions input range on between rails power supplies (v+, v-) nc_ on no_ off output nc_ on between rails off on no_ on between v+ and (+40v - v+) on off v+ on between v+ and (+40v - v+) off on v+ on between v- and (-40v - v-) on off v- on between v- and (-40v - v-) off on v- off between rails off off follows the load terminal voltage. test circuits/timing diagrams t r < 20ns t f < 20ns 50% 0v +10v logic input v- -15v 2k ? com_ gnd (repeat test for in2, in3, and in4.) v in +10v in_ no_ 50% t open 50% 50% 50% 50% 3v t open t on t off t on t off 0v -10v v com +15v v+ nc_ -10v switch output max4533 figure 2. switching-time test circuit
max4533 quad, rail-to-rail, fault-protected, spdt analog switch ______________________________________________________________________________________ 11 test circuits/timing diagrams (continued) 50% v o1 v o2 0.9v o +3v 0v v com 0v v com logic input switch output switch output +15v v+ no v- -15v c l includes fixture and stray capacitance. logic 0 input. gnd logic input 0v 0.9v o t d t d r l2 nc c l2 v o2 v o1 c l1 r l = 1000 ? c l = 35pf com_ v com r l1 in_ max4533 figure 3. break-before-make 0v v+ v in_ ? v out is the measured voltage due to charge- transfer error q when the channel turns off. ? v out v- is connected to gnd (0v) for single-supply operation. q = ? v out x c l v out v+ v out v in_ gnd v+ v- v- in_ nc_ or no_ v com_ max4533 50 ? c l 100pf figure 4. charge injection v- is connected to gnd (0v) for single-supply operation. v+ v+ gnd v+ v- v- in_ no_ com_ max4533 nc_ address select 1mhz capacitance analyzer figure 5. com_, no_, nc_ capacitance
max4533 quad, rail-to-rail, fault-protected, spdt analog switch maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 1999 maxim integrated products printed usa is a registered trademark of maxim integrated products. maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 1999 maxim integrated products printed usa is a registered trademark of maxim integrated products. test circuits/timing diagrams (continued) measurements are standardized against shorts at socket terminals. off isolation is measured between com_ and off no_ or nc_ terminals. on loss is measured between com_ and on no_ or nc_ terminals. crosstalk is measured between com_ terminals with all switches on. signal direction through switch is reversed; worst values are recorded. v- is connected to gnd (0v) for single-supply operation. v+ gnd meas. ref. v+ v- v- in_ com_ max4533 no_, nc_ address select 10nf 10nf network analyzer 50 ? 50 ? 50 ? 50 ? off isolation = 20 log on loss = 20 log crosstalk = 20 log v out v in v out v in v out v in v in v out figure 6. frequency response, off-isolation, and crosstalk part max4533cpp 0? to +70? temp. range pin-package 20 plastic dip max4533eap MAX4533EWP max4533epp -40? to +85? -40? to +85? -40? to +85? 20 ssop 20 wide so 20 plastic dip max4533mjp -55? to +125? 20 cerdip ordering information (continued) chip information transistor count: 448
e nglish ? ???? ? ??? ? ??? what's ne w p roducts solutions de sign ap p note s sup p ort buy comp any me mbe rs max4533 part number table notes: see the max4533 quickview data sheet for further information on this product family or download the max4533 full data sheet (pdf, 224kb). 1. other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales . 2. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 3. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: see full data sheet or part naming c onventions . 4. * some packages have variations, listed on the drawing. "pkgc ode/variation" tells which variation the product uses. 5. part number free sample buy direct package: type pins size drawing code/var * temp rohs/lead-free? materials analysis max4533c /d rohs/lead-free: no max4533c pp+ pdip;20 pin;.300" dwg: 21-0043d (pdf) use pkgcode/variation: p20+2 * 0c to +70c rohs/lead-free: yes materials analysis max4533epp+ pdip;20 pin;.300" dwg: 21-0043d (pdf) use pkgcode/variation: p20+2 * -40c to +85c rohs/lead-free: yes materials analysis max4533c pp pdip;20 pin;.300" dwg: 21-0043d (pdf) use pkgcode/variation: p20-2 * 0c to +70c rohs/lead-free: no materials analysis max4533epp pdip;20 pin;.300" dwg: 21-0043d (pdf) use pkgcode/variation: p20-2 * -40c to +85c rohs/lead-free: no materials analysis max4533c wp+t soic ;20 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w20+4 * 0c to +70c rohs/lead-free: yes materials analysis max4533c wp+ soic ;20 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w20+4 * 0c to +70c rohs/lead-free: yes materials analysis
max4533c wp-t soic ;20 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w20-4 * 0c to +70c rohs/lead-free: no materials analysis max4533c wp soic ;20 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w20-4 * 0c to +70c rohs/lead-free: no materials analysis MAX4533EWP soic ;20 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w20-4 * -40c to +85c rohs/lead-free: no materials analysis MAX4533EWP-t -40c to +85c rohs/lead-free: no max4533c ap ssop;20 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a20-2 * 0c to +70c rohs/lead-free: no materials analysis max4533c ap+t ssop;20 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a20+2 * 0c to +70c rohs/lead-free: yes materials analysis max4533c ap+ ssop;20 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a20+2 * 0c to +70c rohs/lead-free: yes materials analysis max4533c ap-t ssop;20 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a20-2 * 0c to +70c rohs/lead-free: no materials analysis max4533eap+ ssop;20 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a20+2 * -40c to +85c rohs/lead-free: yes materials analysis max4533eap+t ssop;20 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a20+2 * -40c to +85c rohs/lead-free: yes materials analysis max4533eap ssop;20 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a20-2 * -40c to +85c rohs/lead-free: no materials analysis max4533eap-t ssop;20 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a20-2 * -40c to +85c rohs/lead-free: no materials analysis didn't find what you need? c ontac t us: send us an email c opyright 2 0 0 7 by m axim i ntegrated p roduc ts , dallas semic onduc tor ? legal n otic es ? p rivac y p olic y

▲Up To Search▲

Price & Availability of MAX4533EWP

	To Download MAX4533EWP Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .